Assembly Language


Summary

This web pageexamines the use of registers in assembly language. Specific examples ofregisters from various processors are used to illustrate the general nature ofassembly language.

Registerset

 

Registersare fast memory, almost always connected to circuitry that allows variousarithmetic, logical, control, and other manipulations, as well as possiblysetting internal flags.

Most earlycomputers had only one data register that could be used for arithmetic andlogic instructions. Often there would be additional special purpose registersset aside either for temporary fast internal storage or assigned to logiccircuits to implement certain instructions. Some early computers had one or twoaddress registers that pointed to a memory location for memory accesses (a pairof address registers typically would act as source and destination pointers formemory operations). Computers soon had multiple data registers, addressregisters, and sometimes other special purpose registers. Some computers havegeneral purpose registers that can be used for both data and addressoperations. Every digital computer using a von Neumann architecture has aregister (called the program counter) that points to the next executableinstruction. Many computers have additional control registers for implementingvarious control capabilities. Often some or all of the internal flags are combinedinto a flag or status register.

Accumulators


Accumulators are registers that can be used forarithmetic, logical, shift, rotate, or other similar operations. The firstcomputers typically only had one accumulator. Many times there were relatedspecial purpose registers that contained the source data for an accumulator.Accumulators were replaced with data registers and general purpose registers.Accumulators reappeared in the first microprocessors.

  • Intel 8086/80286: one word (16 bit) accumulator; named AX (high order byte of the AX register is named AH and low order byte of the AX register is named AL)

  • Intel 80386: one doubleword (32 bit) accumulator; named EAX (low order word uses the same names as the accumulator on the Intel 8086 and 80286 [AX] and low order and high order bytes of the low order words of four of the registers use the same names as the accumulator on the Intel 8086 and 80286 [AH and AL])

  • MIX: one accumulator; named A-register; five bytes plus sign

 

Dataregisters


Dataregisters are usedfor temporary scratch storage of data, as well as for data manipulations(arithmetic, logic, etc.). In some processors, all data registers act in thesame manner, while in other processors different operations are performed arespecific registers.

  • MIX: one extension register; named X-register; five bytes plus sign; can be concatenated on the right hand side of the A-register (accumulator)

  • Motorola 680x0, 68300: 8 longword (32 bit) data registers; named D0, D1, D2, D3, D4, D5, D6, and D7

 

Addressregisters


Addressregisters store theaddresses of specific memory locations. Often many integer and logic operationscan be performed on address registers directly (to allow for computation ofaddresses).

Sometimesthe contents of address register(s) are combined with other special purposeregisters to compute the actual physical address. This allows for the hardwareimplementation of dynamic memory pages, virtual memory, and protected memory.

The numberof bits of an address register (possibly combined with information from otherregisters) limits the maximum amount of addressable memory. A 16-bit addressregister can address 64K of physical memory. A 24-bit address register canaddress address 16 MB of physical memory. A 32-bit address register can address4 GB of physical memory. A 64-bit address register can address 1.8446744 x 1019of physical memory. Addresses are always unsigned binary numbers.

  • MIX: one jump registers; named J-register; two bytes and sign is always positive

  • Motorola 680x0, 68300: 8 longword (32 bit) address registers; named A0, A1, A2, A3, A4, A5, A6, and A7 (also called the stack pointer)

 

Generalpurpose registers


Generalpurpose registerscan be used as either data or address registers.

  • DEC VAX: 16 word (32 bit) general purpose registers; named R0 through R15

  • IBM 360/370: 16 full word (32 bit) general purpose registers; named 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A (or 10), B (or 11), C (or 12), D (or 13), E (or 14), and F (or 15)

  • Intel 8086/80286: 8 word (16 bit) general purpose registers; named AX, BX, CX, DX, BP, SP, SI, and DI (high order bytes of the AX, BX, CX, and DX registers have the names AH, BH, CH, and DH and low order bytes of the AX, BX, CX, and DX registers have the names AL, BL, CL, and DL)

  • Intel 80386: 8 doubleword (32 bit) general purpose registers; named EAX, EBX, ECX, EDX, EBP, ESP, ESI, and EDI (low order words use the same names as the general purpose registers on the Intel 8086 and 80286 and low order and high order bytes of the low order words of four of the registers use the same names as the general purpose registers on the Intel 8086 and 80286)

  • Motorola 88100: 32 word (32 bit) general purpose registers; named r0 through r31

 

Constantregisters


Constantregisters arespecial read-only registers that store a constant. Attempts to write to aconstant register are illegal or ignored. In some RISC processors, constantregisters are used to store commonly used values (such as zero, one, ornegative one) — for example, a constant register containing zero can be used inregister to register data moves, providing the equivalent of a clearinstruction without adding one to the instruction set. Constant registers are alsooften used in floating point units to provide such value as pi or e withadditional hidden bits for greater accuracy in computations.

  • Motorola 88100: r0 (general purpose register 0) contains the constant 32 bit integer zero

 

Floatingpoint registers


Floatingpoint registers arespecial registers set aside for floating point math.

Index registers


Indexregisters are usedto provide more flexibility in addressing modes, allowing the programmer tocreate a memory address by combining the contents of an address register withthe contents of an index register (with displacements, increments, decrements,and other options). In some processors, there are specific index registers (orjust one index register) that can only be used only for that purpose. In someprocessors, any data register, address register, or general register (or somecombination of the three) can be used as an index register.

  • IBM 360/370: any of the 16 general purpose registers may be used as an index register

  • Intel 80x86: 7 of the 8 general purpose registers may be used as an index register (the ESP is the exception)

  • MIX: five index registers; named I-registers I1, I2, I3, I4, and I5; five bytes plus sign

  • Motorola 680x0, 68300: any of the 8 data registers or the 8 address registers may be used as an index register

 

Baseregisters


Baseregisters or segmentregisters are used to segment memory. Effective addresses are computed byadding the contents of the base or segment register to the rest of theeffective address computation. In some processors, any register can serve as abase register. In some processors, there are specific base or segment registers(one or more) that can only be used for that purpose. In some processors withmultiple base or segment registers, each base or segment register is used fordifferent kinds of memory accesses (such as a segment register for dataaccesses and a different segment register for program accesses).

  • IBM 360/370: any of the 16 general purpose registers may be used as a base register

  • Intel 80x86: 6 dedicated segment registers: CS (code segment), SS (stack segment), DS (data segment), ES (extra segment, a second data segment register), FS (third data segment register), and GS (fourth data segment register)

  • Motorola 680x0, 68300: any of the 8 address registers may be used as a base register

 

Controlregisters


Controlregisters controlsome aspect of processor operation. The most universal control register is theprogram counter.

Program counter


Almostevery digital computer ever made uses a program counter. The programcounter points to the memory location that stores the next executableinstruction. Branching is implemented by making changes to the program counter.Some processor designs allow software to directly change the program counter,but usually software only indirectly changes the program counter (for example,a JUMP instruction will insert the operand into the program counter). Anassembler has a location counter, which is an internal pointer to theaddress (first byte) of the next location in storage (for instructions, dataareas, constants, etc.) while the source code is being converted into objectcode.

The VAXuses the 16th of 16 general purpose registers as the program counter (PC).Almost the entire instruction set can directly manipulate the program counter,allowing a very rich set of possible kinds of branching.

Theprogram counter in System/360 and 370 machines is contained in bits 40-63 ofthe program status word (PSW), which is directly accessible by some instructions.

  • IBM 360/370: program counter is bits 40-63 of the program status word (PSW)

  • Intel 8086/80286: 16-bit instruction pointer (IP)

  • Intel 80386: 32-bit instruction pointer (EIP)

  • Motorola 680x0, 68300: 32-bit program counter (PC)

 

Processorflags


Processorflags storeinformation about specific processor functions. The processor flags are usuallykept in a flag register or a general status register. This caninclude result flags that record the results of certain kinds oftesting, information about data that is moved, certain kinds of informationabout the results of compations or transformations, and information about someprocessor states. Closely related and often stored in the same processor wordor status register (although often in a privileged portion) are controlflags that control processor actions or processor states or the actions ofcertain instructions.

  • IBM 360/370: program status word (PSW)

  • Intel 8086/80286: 16-bit flag register (FLAGS); system flags, control flag, and status flags)

  • Intel 80386: 32-bit flag register (EFLAGS); system flags, control flag, and status flags)

  • MIX: an overflow toggle and a comparison indicator

  • Motorola 680x0, 68300: 16-bit status register (SR); high byte is system byte and requires privileged access, low byte is user byte or condition code register (CCR)

Afew typical result flags (with processors that include them):

  • auxilary carry Set if a carry out of the most significant bit of a BCD operand occurs (binary coded decimal addition). Also commonly set if a borrow occurs in a BCD subtract. Used in Intel 80x86 [AF].

  • carry Set if a carry out of the most significant bit of an operand occurs (addition). Also commonly set if a borrow occurs in a subtract. Used in Digital VAX [C], Intel 80x86 [CF], Motorola 680x0 [C], Motorola 68300 [C], Motorola M68HC16 [C].

  • comparison indicator contains one of three values: less, equal, or greater. Used in MIX.

  • extend Set to the value of the carry bit for arithmetic operations (used to support implementation of multi-byte arithmetic larger than that implemented directly by the hardware. Used in Motorola 680x0 [X], Motorola 68300 [X].

  • half carry Set if a carry out of bit 3 of an operand occurs during BCD addition. Used in Motorola M68HC16 [H].

  • negative Set if the most significant bit of a result is set. Used in Digital VAX [N], Motorola 680x0 [N], Motorola 68300 [N], Motorola M68HC16 [N].

  • overflow Set if arithmetic overflow occurs. Used in Digital VAX [V], Intel 80x86 [OF], Motorola 680x0 [V], Motorola 68300 [V], Motorola M68HC16 [V].

  • overflow toggle a single bit that is either on or off. Used in MIX.

  • parity For odd parity machines, set to make an odd number of one bits; for an even parity machine, set to make an even number of one bits. Used in Intel 80x86 [PF]. The IBM 360/370 has odd parity on memory.

  • sign Set for negative sign. Used in Intel 80x86 [SF].

  • trap Set for traps. Used in Intel 80x86 [TF].

  • zero Set if a result equals zero. Used in Digital VAX [Z], Intel 80x86 [ZF], Motorola 680x0 [Z], Motorola 68300 [Z], Motorola M68HC16 [Z].

Someconditions are determined by combining multiple flags. For example, if aprocessor has a negative flag and a zero flag, the equivalent of a positiveflag is the case of both the negative and zero flags both simultaneously beingcleared.

Afew typical control flags (with processors that include them):

  • decimal overflow trap enable Set if decimal overflow occurs (or conversion error on a VAX). Used in Digital VAX [DV].

  • direction flag Determines the direction of string operations (set for autoincrement, cleared for autodecrement). Used in Intel 80x86 [DF].

  • floating underflow trap enable Set if floating underflow occurs. Used in Digital VAX [FU].

  • integer overflow trap enable Set if integer overflow occurs (or conversion error on a VAX). Used in Digital VAX [IV].

  • interupt enable Set if interrupts enabled. Used in Intel 80x86 [IF].

  • i/o privilege level Used to control access to I/O instructions and hardware (thereby seperating control over I/O from other supervisor/user states). Two bits. Used in Intel 80x86 [IO PL].

  • nested task flag Used in Intel 80x86 [NF].

  • resume flag Used in Intel 80x86 [RF].

  • virtual 8086 mode Used to switch to virtual 8086 emulation. Used in Intel 80x86 [VM].

 

Stackpointer

Stackpointers are usedto implement a processor stack in memory. In many processors, address registerscan be used as generic data stack pointers and queue pointers. A specific stackpointer or address register may be hardwired for certain instructions. The mostcommon use is to store return addresses, processor state information, andtemporary variables for subroutines.

  • IBM 360/370: any of the 16 general purpose registers may be used as a stack pointer

  • Intel 8086/80286: dedicated stack pointer (SP) combined with stack segment pointer (SS) to create address of stack

  • Intel 80386: dedicated stack pointer (ESP) combined with stack segment pointer (SS) and the stack-frame base pointer (EBP) to create address of stack

  • Motorola 680x0, 68300: dedicated user stack pointer (USP, A7) and system stack pointer (SSP, A7) for implicit stack pointer operations, as well as allowing any of the 8 address registers to be as explicit stack pointers

 

Subroutinereturn pointer


Some RISCprocessors include a special subroutine return pointer rather than usinga stack in memory. The return address for subroutine calls is stored in thisregister rather than in memory. More than one level of subroutine callsrequires storing and saving the contents of this register to and from memory.

  • Motorola 88100: r1 is a 32 bit register containing the return pointer generated by bsr and jsr instructions; the register can be read or overwritten by software and can even be used as a temporary general purpose data register